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 MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document by MC44140/D
Chroma Delay Line
HCMOS Technology
The MC44140 is a monolithic 64 s delay line, intended for color TV applications. It may be used as a baseband chroma correction circuit (with PAL), or as a chroma delay line (with SECAM). The device has been designed for use with the MC44000 as part of CHROMA 4, or with the MC44011, but may also be used as a general purpose delay line for other applications. * * * * * * * * Part of SYSTEM 4 Concept Works with Baseband Color Difference Signals PAL (4.43 MHz)/SECAM/NTSC Capability Uses 17.734475 MHz Clock with PAL/SECAM Signals 8-Bit Sampling at 1/6 Clock Frequency External Inputs (Satellite ....) Minimum Number of External Components Low Current (35 mA), + 5 V Supply
16
MC44140
1
P SUFFIX PLASTIC PACKAGE CASE 648-08
16 1
DW SUFFIX PLASTIC PACKAGE CASE 751G-02
ORDERING INFORMATION
MC44140P MC44140DW Plastic DIP SO-L
PIN ASSIGNMENT
CK VDD VSS SC SS IN1B OUT1 EXT1 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 BIAS IN1A IN2A VDD VSS IN2B OUT2 EXT2
(c) Motorola, Inc. MOTOROLA1995
REV 10 2/95
MC44140 2-1
BLOCK DIAGRAM
ANALOG VDD ANALOG VSS DIGITAL VDD DIGITAL VSS EXT R-Y EXT B-Y
BIAS
2
3
16
13
12
8
9
- CLOCK 1 +
BLACK LEVEL VOLTAGE CL4 CL4 CLOCK GENERATOR BIAS SOURCE
SAND- 4 CASTLE SYSTEM SELECT 5
SANDCASTLE AND SYSTEM SELECTION DECODER
EXT CL1 CL3 SECAM SR A/D CL2 CL4 12 CLOCKS CONTROL PAL NTSC R-Y IN 6 CL1 CL3 BLACK LEVEL CURRENT CL1 R-Y IN 15 A D 166 CELLS 8-BIT SHIFT REGISTER D A NOT NTSC
EXT
EXT
SECAM 2
7 NTSC PAL AND NTSC
R-Y OUT
SECAM 1
B-Y IN
11 CL2 CL3 BLACK LEVEL CURRENT CL2 10 NTSC PAL AND NTSC B-Y OUT SECAM 1
B-Y IN
14
A D
166 CELLS 8-BIT SHIFT REGISTER
D A NOT NTSC SECAM 2
MC44140 2-2
MOTOROLA
PIN DESCRIPTIONS
Pin 2 3 1 5 4 Symbol VDD VSS CK SS SC Positive supply voltage. Supply ground. System clock. Supplied from MC440XX master clock. Either 17.734475 MHz (PAL and SECAM) or 14.31818 MHz (NTSC) sine wave. System selection. 4-level signal supplied by MC440XX to indicate whether color difference signals are PAL, NTSC, SECAM, or EXTERNAL. Sandcastle pulse. Periodic multi-level signal supplied by MC440XX. The pulse has 4 levels to indicate the timing of black level, ident. gate, and active signal, together with a level changing every other line. Used to control the clamps and for the timing of the SECAM switching. R-Y (IN1) and B-Y (IN2) inputs to the A/D converters. Baseband color difference (0 to 1.2 MHz) signals supplied by MC440XX via external coupling capacitors of a value greater than 560 nF; these may originate from PAL, NTSC, or SECAM systems. From same source as the "A" inputs but using separate 100 nf coupling capacitors to the direct (un-delayed) inputs. External R-Y (EXT1) and B-Y (EXT2) inputs. These are baseband color difference signals which are ac coupled via 10 nF capacitors from an external source. R-Y (OUT1) and B-Y (OUT2) outputs. The "corrected" baseband color difference signals are returned to MC440XX via external 10 nF capacitors. Bias current. A bias current is fed to this pin by means of an external pull-up resistor of 68 k, in order to set the dc operating point of the operational amplifiers. An external decoupling capacitor to GND of 10 nF is required. Function
15 14 6 11 8 9 7 10 16
IN1A IN2A IN1B IN2B EXT1 EXT2 OUT1 OUT2 BIAS
MOTOROLA
MC44140 2-3
ABSOLUTE MAXIMUM RATINGS
Characteristic Operating Ambient Temperature Range Storage Temperature Package Power Dissipation Symbol TA Tstg PD Value 0 to 70 - 65 to + 150 500 Unit C C mW
GENERAL ELECTRICAL CHARACTERISTICS
Parameter Supply Voltage (Maximum ripple 200 mVpk-pk at 50/100 Hz) Operating Current Operating Power Dissipation (Ext. resistor: R BIAS = 68 k) Pin 2, 13 2, 3 Min 4.75 30 143 Typ 5.0 35 175 Max 5.5 50 275 Unit V mA mW
BIAS CURRENT (BIAS)
Parameter Current (Ext. resistor; R BIAS = 68 k) Pin 16 Min -- Typ 60 Max -- Unit A
CLOCK INPUT (CK)
Parameter Frequency Amplitude (Sinusoidal signal) PAL/SECAM NTSC Pin 1 1 Min -- -- 50 Typ 17.734475 14.318180 -- Max -- -- 1000 Unit MHz mVpp
CLAMP
Parameter Clamp Current (Absolute Value) Clamp Voltage (VCLAMP) Sinked if Vin > Vclamp) Sourced if Vin < Vclamp Pin 6, 11 14, 15 8, 9 Min 10 80 1.3 Typ 25 150 1.4 Max 40 220 1.5 Unit A V
DELAYED SIGNAL CHARACTERISTICS
Parameter Sampling Frequency (Sixth of CK frequency) Number of Samples (Per line period and per signal) Resolution Delay Value (Equal to sandcastle period for PAL/NTSC or to half this period for SECAM) Gain Gain Mismatch Between the Two Lines Gain Mismatch Between Direct and Delayed Signals Impedance Non-Linearity Input Output Differential Integral Min -- 166 7 -- - 0.9 -- -- 10 k -- -- -- Typ 2.95 166 -- 64 0.0 -- -- -- 220 -- -- Max -- 166 8 -- 0.9 2 2 -- -- 1 2 bit s dB % % LSB % Unit MHz
MC44140 2-4
MOTOROLA
COLOR DIFFERENCE INPUT SIGNALS (IN1A, IN1B, IN2A, and IN2B)
Parameter B-Y Voltage Range (peak to peak) R-Y Voltage Range (peak to peak) DC Level (Relative to black level) (For SECAM only; when R-Y, B-Y absent) Bandwidth Line Period Active Signal Duration Black Level Duration 625-Line Systems 525-Line Systems 625-Line Systems 525-Line Systems PAL/NTSC 625-Line PAL/NTSC 525-Line SECAM Pin 6, 15 11,14 Min -- -- - 0.3 0.0 61.7 63.0 -- -- -- -- -- Typ -- -- -- -- 64.0 63.5 52.0 51.6 12.0 11.9 6.0 Max 1.8 1.8 + 0.3 1.2 66.7 64.0 -- -- -- -- -- Unit V V V MHz s s s
SANDCASTLE TIMING CHARACTERISTICS (Pin 4)
Parameter Signal Period PAL/NTSC 625-Line PAL/NTSC 525-Line SECAM PAL/NTSC 625-Line or SECAM 1 PAL/NTSC 525-Line Min -- -- -- -- -- -- -- -- 0.0 Typ 64.0 63.5 128.0 54.0 53.5 54.0 5.0 5.0 1.0 Max -- -- -- -- -- -- -- -- 2.0 Unit s
Level "0" Duration Level "1" Duration (only for SECAM 2) Level "2" Duration Level "3" Duration
s s s s s
Safety Margin Between Start/Finish of Active Signal and Start/Finish of Level "0" or Level "1"
MOTOROLA
MC44140 2-5
FUNCTIONAL DESCRIPTION
The MC44140 has been designed and is intended as a companion device to the MC440XX decoders. As such the MC44140 is used as a baseband chroma correction circuit with PAL, and as the one line delay for SECAM. The device is also compatible with NTSC color difference signals which do not require any correction, and has the facility for routing external R-Y and B-Y signals (e.g., from satellite or from field store feature systems). The block diagram for the MC44140 appears at the beginning of this document. The baseband color difference signals are derived in the MC440XX by demodulation of the chrominance part of the video signal. They are then ac coupled into the MC44140 and black level clamped. Each of the channels has a direct path and a path containing a delay of one line (64 s). The clamped signals from pins 14 and 15 are taken from the input and A/D converted to a 8-bit wide digital data stream; this then passes through shift registers containing 166 cells in order to realize the one line delay. After this, the data is converted back into analog signals by means of D/A converters. The clocks for the converters are derived by dividing by 6 the frequency obtained from the CHROMA 4 master oscillator, which consists of a crystal running at 17.734475 MHz for PAL and SECAM. Timing of the switches and clamps in the circuit is achieved by means of a special sandcastle pulse provided by the MC440XX. Mode selection is also undertaken by the MC440XX by means of a 4 voltage level output supplied to pin 5. Color difference signals provided by the MC440XX may originate from any one of PAL, SECAM, or NTSC, so the treatment of these incoming signals is different according to the mode selected; as determined by the SYSTEM SELECT level emanating from the MC440XX. Referring to the block diagram, it is possible to follow the procedure adopted for each standard. The clamping action may be interpreted in each case from Figures 1 thru 4. In the case of PAL signals, black level clamps CL1 and CL2 are in use every line. Considering only the R-Y channel, it will be seen that the signal is ac coupled into the circuit at pin 6 (direct) and pin 15 (delayed). CL1 clamps the input at pin 15 to the BLACK LEVEL VOLTAGE, this signal then passes through the delay line. The second CL1 clamp uses the dc level present after the delay line to clamp the black level of the direct path. The two signals are then buffered and averaged together, and the result is switched through to the output at pin 7. For NTSC color difference signals, black level clamps CL1, 2 and 3 are all in use on every line. Again considering the R-Y channel, the inputs at pins 6 and 15 are both clamped to BLACK LEVEL VOLTAGE by CL1 and CL3. The delayed path is now switched out of circuit, however, as this is not required with NTSC. The direct path only is then routed to the output at pin 7. The nature of the SECAM color difference signals is somewhat different from the other standards in that the signal is only present on every other line as is indicated in Figure 3. For the R-Y channel, the delayed path input is clamped to BLACK LEVEL VOLTAGE by CL1 at pin 15. The direct path signal is clamped by the other CL1 switch to the dc level of the delayed path (including any offsets) to ensure there is no difference in clamping level between the two paths. During the period "SECAM 1", the B-Y signal is present and this is clamped to the delayed path dc level. Switch SECAM 1 is closed during this time and so the direct signal passes straight to the output. During the next line period (SECAM 2) there is no direct path signal; now switch SECAM 2 is closed and switch SECAM 1 is open. Therefore, the delayed path signal is now switched through to the output. For the R-Y channel the exact reverse process will occur as in this case the direct path signal is present during the "SECAM 2" lines. When EXT R-Y and B-Y signals are used, these are assumed to be always "corrected" from whichever source they originate. These signals are ac coupled into the circuit at pins 8 and 9 and are switched straight through to the outputs, using clamps CL4 to set the black level voltage of the two channels line by line. SIGNALS SUPPLIED BY MC440XX DECODERS Sandcastle Pulse This is a multi-level line repetitive timing pulse input to pin 4 of the IC. The signal provides timing commands to the clamp circuits CL1, CL2, CL3, and CL4 and is also necessary for the clock generator to indicate the beginning of active signal storage. The pulse train contains a level changing at half line rate which is used to control the switches SECAM 1 and SECAM 2 when the circuit is operating in the SECAM mode. Tables 1 and 2 explain the meaning of the different levels as used with the sandcastle pulse. It should be noted that "level 1" of the pulse is only used for line by line switching in SECAM mode. System Selection Signal This input may have any one of four different dc voltage levels and is used to command the functioning of the NTSC, PAL and NTSC, SECAM 1, SECAM 2 and EXT switches of the block diagram for the four possible modes of operation. For the SECAM mode this signal together with the sandcastle pulse command switches SECAM 1 and SECAM 2. The significance of the different levels is given in Table 3. Input Color Difference Signals The general appearance of the baseband inputs as derived from the MC440XX with a color bars input, is shown in Figures 1 thru 4. Each of the color difference signals has two ac coupled inputs to the MC44140. The line period is 64 s for 625 line systems and 63.5 s for 525 line systems. Whichever line standard is in use, only about 52 s of active signal time needs to be stored and delayed for one line period for processing. The PAL and NTSC inputs are both present at the same time on every line and black level is provided during the whole of the line blanking period (sandcastle periods 2 and 3) to serve as a reference for the active signal. With SECAM only one color difference signal is provided on any given line by the MC440XX, while the other is replaced by a dc level for the duration of that line period. On the following line the sequence is then reversed. For the signal provided, black level is supplied during blanking time minus the ident. gate period (i.e., sandcastle period 3 only). Output Color Difference Signals Whatever the origin of the input signals, the two outputs supplied at pins 7 and 10 are always corrected signals which are then ac coupled back to the MC440XX. Black level is pro-
MC44140 2-6
MOTOROLA
vided during the whole line blanking period to allow the MC440XX to clamp the signals on the other end of the external output coupling capacitors. Differential Clock Input Pins 1 and 16 form a differential clock input of high sensitivity and good noise rejection. Pin 16 is an ac ground of the differential input and must be decoupled to ground. APPLICATION CIRCUIT A schematic diagram of the MC44140 application circuit is shown in Figure 5. All of the inputs/outputs shown on the left of the diagram have the MC44000 as their destination. The 17.7 MHz and 14.3 MHz crystals shown in fact form part of the MC44000 circuit; this device controls the crystal selection
and applies the drive to it. The majority of the rest of the circuit consists of coupling capacitors for the signal inputs and outputs, whose function for black level clamping has already been described. A pull-up resistor is connected to pin 16 for the purpose of providing a bias current, which the IC uses to set the dc operating point of internal operational amplifiers. Separate power supply pins (VDD and VSS) are provided to each of the analog section and the digital section of the chip. Both of the + 5 V supply pins are filtered using a series resistor and small ceramic and electrolytic capacitors mounted close by each supply pin and its adjacent ground pin. The supplies, especially the analog pin, should be very well bypassed in order to avoid noise interfering with the clock input (pin 1), whose input level is only some 50 mVp-p.
MOTOROLA
MC44140 2-7
R-Y INPUT
B-Y INPUT 3 2 SANDCASTLE 0 0
CL1
CL2
CL3
CL4
Figure 1. PAL
R-Y INPUT
B-Y INPUT 3 2 SANDCASTLE 0 0
CL1
CL2
CL3
CL4
Figure 2. NTSC
MC44140 2-8
MOTOROLA
R-Y INPUT
B-Y INPUT 3 2 SANDCASTLE 1 0 SECAM 1 CL1 SECAM 2 1
CL2
CL3
CL4
Figure 3. SECAM
R-Y EXT INPUT
B-Y EXT INPUT 3 2 SANDCASTLE 0 0
CL1
CL2
CL3
CL4
Figure 4. EXT
MOTOROLA
MC44140 2-9
Table 1. Sandcastle Ident. Pulse for PAL/NTSC
Typical Duration D ration s 5.0 5.0 PAL NTSC 54.0 53.5 Range (VDD = 5.00 V) Lower Limit 3.67 V 2.34 V 0.00 V -- Upper Limit 5.00 V 3.27 V 0.50 V --
Level 3 2 0
Meaning Black Level Black Level Active Signal
Table 2. Sandcastle Ident. Pulse for SECAM
Level in Chrono- logical Order 3 2 0 3 2 1 Typical yp Duration s 5.0 5.0 54.0 5.0 5.0 54.0 Meaning B-Y Input Black Level Ident. Gate Active Signal DC Level DC Level DC Level R-Y Input DC Level DC Level DC Level Black Level Ident. Gate Active Signal SECAM 2 SECAM 1 Line Period Range (VDD = 5.00 V) Lower Limit 3.67 V 2.34 V 0.00 V 3.67 V 2.34 V 0.90 V Upper Limit 5.00 V 3.27 V 0.50 V 5.00 V 3.27 V 1.94 V
Table 3. System Selection
Typical Voltage 0.00 V 1.40 V 2.50 V 5.00 V Range (VDD = 5.00 V) Lower Limit 0.00 V 0.90 V 2.34 V 3.67 V Upper Limit 0.50 V 1.94 V 3.27 V 5.00 V
Level 0 1 2 3 PAL NTSC SECAM
Meaning
EXTERNAL
MC44140 2-10
MOTOROLA
+5V 7R B-Y OUT 36 68 K 16 15 14 MC44140 4 5 100 nF 6 100 nF R-Y IN 27 10 nF 8 100 nF B-Y IN 26 R-Y OUTPUT B-Y OUTPUT EXT R-Y INPUT EXT B-Y INPUT 9 7 10 10 nF 11 13 10 nF 12 100 nF 22 SYSTEM 30 SELECT 10 nF 1.0 F R-Y OUT 37 17.7 MHz XTAL1 33 MC440XX 14.3 MHz XTAL2 32 22 p 1 2 22 p 120 p 22 22 nF 3 27R 1.0 F
SANDCASTLE 31
Figure 5. Application Circuit
MOTOROLA
MC44140 2-11
PACKAGE DIMENSIONS
P SUFFIX PLASTIC CASE 648-08
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01
-A-
16 9
B
1 8
F S
C
L
-T- H G D
16 PL
SEATING PLANE
K
J TA
M STYLE 2: PIN 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16.
M
0.25 (0.010)
M
STYLE 1: PIN 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16.
CATHODE CATHODE CATHODE CATHODE CATHODE CATHODE CATHODE CATHODE ANODE ANODE ANODE ANODE ANODE ANODE ANODE ANODE
COMMON DRAIN COMMON DRAIN COMMON DRAIN COMMON DRAIN COMMON DRAIN COMMON DRAIN COMMON DRAIN COMMON DRAIN GATE SOURCE GATE SOURCE GATE SOURCE GATE SOURCE
MC44140 2-12
MOTOROLA
PACKAGE DIMENSIONS
DW SUFFIX SO-L CASE 751G-02
-A16 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 10.15 10.45 7.60 7.40 2.65 2.35 0.49 0.35 0.90 0.50 1.27 BSC 0.32 0.25 0.25 0.10 7 0 10.05 10.55 0.75 0.25 INCHES MIN MAX 0.400 0.411 0.292 0.299 0.093 0.104 0.014 0.019 0.020 0.035 0.050 BSC 0.010 0.012 0.004 0.009 7 0 0.395 0.415 0.010 0.029
-B1 8
P 8 PL 0.25 (0.010)
M
B
M
G 14 PL
J
F R X 45 C -TD 16 PL 0.25 (0.010) K
M SEATING PLANE
M
S
T
A
S
B
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters can and do vary in different applications. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
MOTOROLA
MC44140 2-13
Literature Distribution Centers: USA: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. EUROPE: Motorola Ltd.; European Literature Centre; 88 Tanners Drive, Blakelands, Milton Keynes, MK14 5BP, England. JAPAN: Nippon Motorola Ltd.; 4-32-1, Nishi-Gotanda, Shinagawa-ku, Tokyo 141, Japan. ASIA PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Center, No. 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong.
MC44140 2-14
*MC44140/D*
MOTOROLA MC44140/D


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